Answer: The CP2102 is Silicon Labs’ USB-to-UART bridge in a 5 × 5 mm QFN-28. It has an internal 48 MHz oscillator, so no crystal, and an on-chip regulator that turns 4.0–5.25 V from VBUS into 3.3 V on VDD, which can also power up to 100 mA of other circuitry. The UART runs to 921600 bps and brings out all modem lines. The datasheet’s ordering part number is CP2102-GM, and its front page recommends CP2102N for newer designs. (Silicon Labs CP2102/9 Rev. 1.8, pp.1, 5–19.)
Key specifications
| Parameter | Value | Condition | Source |
|---|---|---|---|
| Package | QFN-28, 5 × 5 mm, 0.5 mm pitch, exposed pad | — | Table 10, p.14 |
| Supply (VDD) | 3.0 / 3.3 / 3.6 V | Self-powered | Table 3, p.7 |
| Regulator input (REGIN) | 4.0–5.25 V | Bus-powered | Table 6, p.9 |
| Regulator output | 3.0 / 3.3 / 3.6 V at 1–100 mA; 100 mA max | — | Table 6, p.9 |
| Supply current | 20 typ / 26 max mA (normal); 80 typ / 100 max µA (suspended) | IREGIN, VREG enabled | Table 3, p.7 |
| Baud rate | Up to 921600 bps | — | Table 4, p.8 |
| I/O levels | VIH ≥ 2.0 V; VIL ≤ 0.8 V; VOL ≤ 0.6 V at 8.5 mA | VDD 3.0–3.6 V | Table 4, p.8 |
| Voltage on I/O, VBUS, RST | −0.3 to 5.8 V | Absolute maximum | Table 2, p.6 |
| VDD absolute maximum | −0.3 to 4.2 V | — | Table 2, p.6 |
| Default USB IDs | VID 10C4h, PID EA60h; serial “0001” | Unprogrammed EEPROM | Table 13, p.17 |
| EEPROM | 1024 bytes; 100,000 write cycles typ; 100-year retention | — | Table 1 p.5; §8 p.17 |
| Operating temperature / θJA | −40 to +85 °C / 32 °C/W | θJA with exposed pad soldered, multilayer PCB | Table 3, p.7 |
Pinout (QFN-28, top view)
| Pin | Name | Notes (Table 9, p.11) |
|---|---|---|
| 1 | DCD | Input, active low |
| 2 | RI | Input, active low |
| 3 | GND | Plus the exposed pad |
| 4 / 5 | D+ / D− | USB; matching and pull-up resistors are on-chip |
| 6 | VDD | 3.0–3.6 V in, or the 3.3 V regulator output |
| 7 | REGIN | 5 V regulator input |
| 8 | VBUS | VBUS sense; 5 V here means “connected” |
| 9 | RST | Open-drain reset; drive low ≥ 15 µs to reset |
| 11 | SUSPEND (active low) | Driven low in USB suspend |
| 12 | SUSPEND | Driven high in USB suspend |
| 23 / 24 | CTS / RTS | Active low |
| 25 / 26 | RXD / TXD | — |
| 27 / 28 | DSR / DTR | Active low |
| 10, 13–22 | NC | Leave open or tie to VDD (18 is VPP on CP2109) |
Two ways to power it
| Configuration | Wiring | Notes |
|---|---|---|
| Bus-powered (Figure 6) | VBUS and REGIN from USB 5 V; 1.0 µF ∥ 0.1 µF on REGIN; 4.7 µF ∥ 0.1 µF on VDD | VDD becomes a 3.3 V rail for up to 100 mA total |
| Self-powered, regulator off | 3.0–3.6 V into VDD with REGIN tied to it (§10) | If VDD can be off while VBUS is at 5 V, add the resistor divider from Figure 8/10 note 1 |
Budget example (bus-powered): the regulator is good for 100 mA. CP2102 itself takes up to 26 mA, so roughly 74 mA is left for an MCU or sensors on the same 3.3 V rail.
SUSPEND pins at reset
Both SUSPEND outputs float high briefly during reset and stay asserted until USB enumeration completes (§6, p.15). If pin 12 switches power to other circuitry, add a strong (10 kΩ) pull-down so it stays low during reset.
Production status
Silicon Labs’ product page says it expects to keep producing CP2102 until at least March 2029 (read on 26 Oct 2026). That is the maker’s stated expectation, not a guarantee. The datasheet itself recommends CP2102N for newer designs (Rev. 1.8, p.1).
Pitfalls specific to CP2102
- Wiring 5 V to VDD. VDD tops out at 3.6 V (4.2 V absolute maximum); 5 V goes to REGIN.
- Shipping with the default VID/PID. Silicon Labs recommends a custom VID/PID (it offers free PIDs under its VID) and unique serial numbers when several units may share one PC (§8).
- Leaving the exposed pad unsoldered. The 32 °C/W figure assumes it is soldered to a multilayer board.
- Assuming 2 Mbps like CH340G. The listed maximum is 921600 bps.
Part numbers (information only)
The datasheet lists one ordering part number: CP2102-GM (QFN-28, lead-free, pin-compatible with CP2101-GM). Reel suffixes are not listed in the datasheet. Sister device in the same datasheet: CP2109-A01-GM (OTP EPROM instead of EEPROM).
FAQ
- Can the CP2102 run from 5 V? Yes, through REGIN (4.0–5.25 V). The on-chip regulator then supplies 3.3 V on VDD. Do not put 5 V on VDD.
- How much current can the CP2102 regulator supply? 100 mA maximum, including the CP2102 itself.
- What are the CP2102 default VID and PID? 10C4h and EA60h.
- Does CP2102 need a crystal? No, it has an internal 48 MHz oscillator.
- Is CP2102 still in production? Silicon Labs’ product page says it expects production through at least March 2029; it recommends CP2102N for new designs.
Related (internal links)
- CH340G alternatives: CH340C, CH340E, CP2102, FT232RL
- CH340 selector
- FTDI FT232RL
- WCH CH340G
- USB-UART bridges
Sources (retrieved 2026-10-26)
- Silicon Labs, CP2102/9 Single-Chip USB-to-UART Bridge, Rev. 1.8: https://www.silabs.com/documents/public/data-sheets/CP2102-9.pdf
- Silicon Labs, CP2102 product page (production outlook, read 26 Oct 2026): https://www.silabs.com/interface/usb-bridges/classic/device.cp2102
Disclaimer
Values are copied from Silicon Labs CP2102/9 Rev. 1.8, read on 26 Oct 2026. The production outlook comes from the maker’s website and is not a guarantee. Validate on your own hardware.
Reviewed by: Jasper · Updated: 2026-10-26